1. Field of the Invention
The present invention relates to a wire for electrically connecting a semiconductor chip to a semiconductor substrate, e.g., a lead frame to a printed circuit board, when fabricating a semiconductor package, and more particularly to a gold (Au)-silver (Ag) based alloy wire.
2. Description of the Related Art
Conventionally, Au has been used for forming wires for semiconductor packages. However, in order to decrease the fabrication costs in the semiconductor industry and cope with the recent increases in a gold price, Au—Ag alloy wires have been newly used. Since Ag forms a complete solid solution when combined with Au, such alloys can be mass produced to decrease the fabrication costs of wires for semiconductor packages.
Studies on conventional Au—Ag alloy wires have been disclosed in Japanese Patent laid-open Application Nos. 1998-326803, 1999-67811 and 2000-150562. However, such Au—Ag alloy wires are stable to a dry reliability test but significantly unstable to a high humidity reliability test dissimilar to general Au wires.
For example, reliability standards in the semiconductor industry include a high temperature storage life time test (HTST), a highly accelerated temperature & humidity storage test (HAST), a pressure cooker test (PCT), a temperature humidity test (TH) and a temperature cycle test (TC). Among these tests, the HTST or the TC are examples of the dry reliability test, and the HAST, the PCT, and the TH are examples of the high humidity reliability test.
Referring to FIG. 1, an Au wire has a high bonding strength in both the dry reliability test and the high humidity reliability test. However, an Au—Ag alloy wire has a higher bonding strength in the dry reliability test than in an initial period, but has a considerably weak bonding strength in the high humidity reliability test. That is, the Au—Ag alloy wire is very vulnerable to the high humidity test.
Referring to FIG. 2, a semiconductor chip 120 is stacked on a package substrate 110, and pads 125 of the semiconductor chip 120 and external terminals (not shown) of the package substrate 110 are connected by wires 130 and balls 135 of the wires 130. In this case, many of the Au—Ag alloy wires 130 are detached from the pad 125 of the semiconductor chip 120 during a high humidity reliability test, e.g., a PCT. Such poor humidity reliability is a significant obstacle to the use of Au—Ag alloy wires for semiconductor packages despite their low cost.